Sandro Bartolini is an associate professor at the Department of Information Engineering and Mathematical Sciences of the University of Siena, Italy. He graduated in “Computer Engineering” cum laude at the Università di Pisa, Italy, where he got his PhD in “Computer Science and Engineering”.
His main research interests comprise: high-performance computer architectures, embedded systems, on-chip photonic interconnections, high-performance-computing (HPC), software optimizations for performance and low-power in modern chip-multi-processors, GPGPU computing and innovative approaches for high-productivity and performance-portability in parallel programming for GPUs and CPUs, application-specific accelerators, cryptography and information security, block-chain and crypto-currency algorithm acceleration.
Since years he teaches “Design of Applications Systems and Services” in the Computer and Automation Engineering Master course at the University of Siena. He has been teacher of Integrated Photonics for Computing in a Doctorate course at the Universidad de Valencia and he has been PhD committee member multiple times in foreign and national Universities. He has hold seminars on advanced C++ programming for performance and productivity in companies, as well as seminars on security and operating systems.
He participated in various research, and research-and-development, projects on the cited, or related, topics. He was the main investigator of the Siena research group within project PHOTONICA – Photonic Interconnect Technology for Chip Multiprocessing Architectures, funded by the Italian Ministry of University and Research (FIRB Futuro in Ricerca program for young researchers). From this project stemmed a variety of activities and collaborations: for example with Murcia University, Columbia University, Université de Montréal, Hong Kong University of Science and Technology, as well as with companies like STMicroelectronics, Intel Munich, IBM, VPI Photonics, IHP, IMEC.
He managed or co-managed the design, and often implementation, of complex and innovative IT systems for various companies like: Siemens Italy, Adnkronos, RAI, SpaceDys, UaU Group Limited.
He is associate editor of the Eurasip Journal of Embedded Computing and he is an active member of the European Network of Excellence Europea HiPEAC (High PErformance Architecture and Compilation). He has been co-guest editor of different international journals: various editions of ACM SigArch Computer Architecture Newsletter, Springer Transactions on High PErformance Architectures and Compilation (HIPEAC III) journal, Journal of Embedded Computing, Concurrency and Computation: Practice and Experience.